Normalcomputing
Hardware Engineer, Physical Design
- Confirmed live in the last 24 hours
- $200k–$400k
- Mid level
- Full-time
- Remote · Silicon Valley
- Added 2 months ago
About this role
Normal Computing is seeking a skilled Hardware Engineer to lead the physical design implementation of their cutting-edge silicon solutions. This role involves owning the entire netlist-to-GDSII flow, collaborating closely with RTL and architecture teams to ensure physical feasibility, and driving optimization for power, performance, and area. The ideal candidate will have a proven track record of successful tapeouts and expertise in industry-standard physical design tools.
What you'll do
- Lead full netlist-to-GDSII physical design flow (floorplanning, placement, routing, CTS).
- Own static timing analysis (STA) and timing closure.
- Optimize for power, performance, and area (PPA).
- Execute physical signoff checks (DRC, LVS, ERC).
- Collaborate with RTL, architecture, and DFT teams on floorplanning and feasibility.
- Manage tapeout checklists and support post-silicon debugging.
What they're looking for
- Physical Design
- Floorplanning
- Place and Route (P&R)
- Clock Tree Synthesis (CTS)
- Static Timing Analysis (STA)
- DRC/LVS
- Innovus/IC Compiler II/Tempus
- PrimeTime/Pegasus/Calibre
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Normalcomputing
Likely interview questions
- Describe your experience with STA and how you've handled timing closure challenges.
- Walk me through your typical workflow for a physical design implementation.