Design Verification Engineer (Silicon Engineering)

About this role

SpaceX is looking for a proactive Design Verification Engineer to join their Silicon Engineering team in Austin, TX. The role focuses on the verification of digital ASICs, ensuring robust connections for the Starlink internet system across various applications.

What you'll do

• Verify digital ASICs at block and system level
• Write and review test plans and develop test harnesses
• Create SystemVerilog testbench infrastructure
• Execute test plans and manage regression testing
• Automate test case generation with Python and MATLAB
• Support pre-silicon verification and post-silicon validation

What they're looking for

• Bachelor's degree in electrical or computer engineering
• 1+ years in design verification
• Knowledge of UVM verification methodologies
• Strong problem-solving skills
• Proficiency in Python and MATLAB
• Experience with scripting and automation
• Familiarity with RTL design and chip validation