SpaceX
Design Verification Engineer (Silicon Engineering)
Sunnyvale, CA$135k–$155kmidAdded 2 days ago
About this role
SpaceX is looking for a Design Verification Engineer to work on advanced ASICs for the Starlink project, enhancing global internet connectivity. This role involves collaborating with multidisciplinary teams to verify digital designs and contribute to the entire testing process from pre-silicon to post-silicon.
What you'll do
- Verify digital ASICs at block and system levels
- Develop test plans and test harnesses
- Create SystemVerilog testbench infrastructure
- Execute test plans and manage regressions
- Automate test case generation using Python and MATLAB
- Contribute to chip bring-up and validation
What they're looking for
- Bachelor’s degree in electrical/computer engineering
- 1+ years in design verification
- Experience with UVM verification methodology
- Strong problem-solving abilities
- Proficient in Python and MATLAB
- Knowledge of RTL design
- Experience with test plan development
- Ability to adapt to dynamic environments
Benefits
- Competitive salary based on experience
- Stock options and long-term incentives
- Comprehensive health, vision, and dental coverage
- 401(k) retirement plan
- Paid parental leave
- Three weeks paid vacation and additional holidays
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