New Graduate Engineer, ASIC Design (Starshield)

About this role

SpaceX is seeking a New Graduate Engineer for ASIC Design on their Starshield team, which utilizes Starlink technology to enhance U.S. National Security efforts. This role involves developing advanced FPGAs and ASICs for space and ground systems and requires effective collaboration in a dynamic environment.

What you'll do

• Design digital ASICs and FPGAs for Starshield projects
• Evaluate architectural trade-offs and derive subsystem specifications
• Define micro-architecture and implement RTL in Verilog/System Verilog
• Collaborate with the verification team to ensure design integrity
• Provide timing constraints and support physical implementation team
• Participate in silicon bring-up and assist in automated test equipment development

What they're looking for

• Bachelor’s in electrical/computer engineering or computer science
• Experience in RTL implementation and FPGA/ASIC development
• Problem-solving in clock domain crossings and power optimization
• Knowledge of standard bus protocols like AXI and AHB
• Scripting skills in Python, TCL, etc.
• Experience with HDL simulators and FPGA tools
• Ability to adapt in a dynamic environment
• Team-oriented and proactive attitude

Benefits

• Competitive salary range of $125,000 - $150,000
• Eligibility for long-term incentives and bonuses
• Comprehensive medical, vision, and dental coverage
• 401(k) retirement plan with employer contributions
• Paid parental leave and vacation time
• Paid holidays and sick leave