MatX
Design Verification Engineer
About this role
MatX is hiring a Design Verification Engineer to develop and execute verification strategies for high-performance AI accelerator silicon. You'll own verification across subsystems and full-chip, building testbenches and driving coverage closure from architecture through tapeout while ensuring functional correctness and performance.
What you'll do
- Develop scalable verification methodology across block, subsystem, and full-chip levels
- Create and execute testbenches, tests, and verification artifacts to achieve structural and functional coverage
- Own verification execution at subsystem and chip-level with accountability for quality
- Plan and drive verification reviews, tracking progress toward design freeze and tapeout milestones
- Build portable tests and drivers applicable to both pre-silicon verification and post-silicon debug
- Collaborate on silicon debug and bring-up activities
What they're looking for
- SystemVerilog
- UVM and assertion-based verification (ABV)
- Python, C/C++, or similar scripting languages
- Formal and simulation-based verification
- High-performance compute microarchitecture (CPUs, GPUs, accelerators)
- Memory management and high-speed connectivity design
- Emulation and prototyping platforms
- Silicon debug and validation
Benefits
- Equity compensation with flexible mix
- Comprehensive health, dental, vision, and life insurance
- 4 weeks PTO, 12 company holidays, flexible/remote work options
- Up to 12 weeks paid parental leave
- $1,500 annual professional development budget
- 401(k)/Roth IRA with 5% company match, commute reimbursement, home-tech setup
Opens the official application on the employer’s site. No login required.
MatX
MatX builds cutting-edge AI silicon and the system software stack to power it, focusing on optimizing hardware and software for large-scale machine learning workloads. The company is hiring system software engineers, kernel developers, compiler engineers, hardware simulators, and SOC integration engineers to design high-performance AI compute platforms.
View all jobs at MatXLikely interview questions
- Walk us through a verification project where you owned coverage closure from specification to tapeout—what were the biggest challenges?
- Describe your experience with UVM and how you've applied it to subsystem or full-chip verification.