Principle Engineer

About this role

Samsung Semiconductor is seeking a Principal Engineer to lead high-speed SerDes analog circuit design and architecture for advanced interconnect transceivers. You'll supervise a design team while developing cutting-edge analog and mixed-signal circuits for applications like USB, PCIe, and Ethernet using state-of-the-art CMOS technologies.

What you'll do

• Define architecture and circuits for SerDes IP projects including clock generation and analog components
• Supervise designers through complete design execution, silicon validation, and debugging phases
• Translate design specifications into schematics and build simulation test-benches for performance evaluation
• Optimize circuit layouts to improve power consumption and performance metrics
• Work on high-speed interconnect standards (UCIe, UA-link, Ethernet at 224/448Gbps)
• Collaborate on low-power, low-voltage analog and custom digital designs using advanced processes

What they're looking for

• SerDes and analog/mixed-signal SoC design (7+ years)
• Analog circuit design: bandgap, LDO, filters, ESD, PLL, clock generation
• SerDes components: CTLE, DFE, FFE, clock distribution, phase interpolators, IQ generation
• High-speed interconnect standards: USB, PCIe, UCIe
• EDA tools: Cadence, Spectre, Totem, EMX
• Scripting languages: Python, MATLAB
• CMOS process technology and advanced node design
• Team leadership and design supervision

Benefits

• Competitive compensation with performance-based incentives
• Opportunity to work on cutting-edge semiconductor technologies
• Global company with diverse, inclusive culture
• Onsite work environment in San Jose
• Professional growth and learning opportunities

Likely interview questions

• Walk us through a complex SerDes design you led—what were the key challenges in achieving the required performance and power targets?
• Describe your experience with CTLE, DFE, and FFE circuit design and how you optimized them for low power.