SK hynix America
3D Stacked DRAM Design Engineer
About this role
SK hynix America is seeking a 3D Stacked DRAM Design Engineer in San Jose to lead high-speed digital IP design for next-generation 3D-stacked DRAM solutions in close partnership with U.S. customers. The role combines custom circuit design, RTL-to-implementation workflows, and strategic customer collaboration to advance DRAM-on-Logic technology.
What you'll do
- Design high-speed digital IP for 3D-stacked DRAM peripheral circuits and DFT (design-for-test) modules
- Execute full RTL design through physical implementation for DRAM-based projects
- Conduct foundry verification of production-ready IPs and establish IP business infrastructure
- Co-develop next-generation DRAM-on-Logic solutions with key U.S. customers
- Validate DRAM specifications and circuit compliance across wafer, package, and system-level testing
- Perform PDN analysis and full custom-digital co-design optimization
What they're looking for
- DRAM circuit design and custom design methodology (Virtuoso or equivalent)
- RTL design and digital implementation flows
- SPICE simulators (HSPICE, PrimeSim, Spectre)
- Python programming for automation and analysis
- DRAM architecture and specification review
- Power distribution network (PDN) analysis
- Technical communication and cross-functional collaboration
- Full custom and logic foundry design experience
Benefits
- Top-tier health insurance at no employee cost
- PTO, company holidays, and Happy Fridays
- Paid parental leave program
- 401(k) matching
- Up to $10,000 annual education reimbursement for job-related degrees
- Free meals (breakfast, lunch, dinner) and corporate discounts
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SK hynix America
SK hynix America designs advanced memory solutions including high-bandwidth memory (HBM) and AI-focused memory architectures, with a focus on next-generation chip performance and energy efficiency. The company is hiring circuit design engineers, systems engineers, application engineers, and packaging specialists to develop innovative memory technologies for AI and high-performance computing platforms.
- Website
- skhynix.com
Likely interview questions
- Walk us through a complex DRAM circuit design project where you led RTL-to-implementation; what were the key challenges and how did you address power and timing constraints?
- Describe your experience with SPICE simulation and PDN analysis in DRAM peripheral circuit design—what tools and methodologies have you used?