Physical Design Engineer (Silicon Engineering)

About this role

SpaceX seeks a Physical Design Engineer to develop cutting-edge ASICs for Starlink's satellite and ground infrastructure. You'll perform RTL-to-GDSII implementation, drive physical design methodologies, and collaborate with cross-functional teams to deliver next-generation connectivity solutions globally.

What you'll do

• Execute synthesis, floorplanning, place-and-route, and signoff closure (timing, power, noise, physical verification)
• Develop and optimize physical design automation scripts and methodologies
• Collaborate with ASIC design teams on feasibility studies, timing/power/area targets, and RTL tradeoffs
• Resolve design congestion, timing, and flow issues with technical solutions
• Debug and fix STA, noise, equivalency, electromigration, and voltage drop closure issues

What they're looking for

• RTL2GDSII physical design flow
• EDA tools (synthesis, P&R, STA, verification)
• Deep sub-micron FinFET and CMOS physics
• Static timing analysis and power analysis
• Scripting (Python, Perl, TCL, bash/csh)
• Physical design verification and signoff
• DFT/Scan/MBIST concepts and impacts
• CMOS digital and analog design principles

Benefits

• Comprehensive medical, vision, and dental coverage
• 401(k) retirement plan with employer contributions
• Stock options and Employee Stock Purchase Plan
• 3 weeks paid vacation and 10+ paid holidays annually
• Short and long-term disability, life insurance, paid parental leave
• Discretionary bonuses and various perks/discounts