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Tenstorrent

Mixed Signal IC Layout Engineer

Santa Clara, California, United StatesmidAdded today

About this role

Tenstorrent seeks an experienced Mixed Signal IC Layout Engineer to design full-custom analog and mixed-signal blocks for advanced FinFET processes, transforming schematics into high-performance, manufacturable layouts for AI semiconductor platforms. This remote role demands expertise in high-speed circuit blocks, custom layout tools, and deep process knowledge to support cutting-edge chip development.

What you'll do

  • Execute full-custom layout of analog/mixed-signal blocks (PLLs, VCOs, ADCs, DACs, LDOs, comparators) from schematics to silicon-ready designs
  • Optimize floorplans, placement, and routing to balance area, parasitics, matching, and integration while meeting performance and power targets
  • Apply layout best practices to manage EM/IR, ESD, latch-up, coupling, and parasitics in dense mixed-signal environments
  • Close physical verification (DRC, LVS, ERC, DFM, Antenna) and support post-layout extraction and simulation
  • Collaborate with circuit designers to own complex blocks independently and integrate into larger SoCs
  • Contribute layout methodology improvements, automation scripts, and tools to enhance team productivity

What they're looking for

  • Full-custom analog/mixed-signal IC layout
  • Synopsys Custom Compiler or Cadence Virtuoso
  • Physical verification tools (Synopsys ICV, Siemens Calibre)
  • CMOS/FinFET process nodes (12nm–2nm)
  • High-speed circuit blocks (PLLs, VCOs, ADCs, DACs, LDOs, clock generators)
  • EM/IR, ESD, and latch-up analysis
  • Python, Tcl, or SKILL scripting
  • Parasite extraction and post-layout simulation

Benefits

  • Competitive compensation package ($100k–$500k range including base and variable targets)
  • Remote work opportunity based anywhere in the United States
  • Exposure to cutting-edge FinFET technologies down to 2nm
  • Opportunity to influence layout flows, methodologies, and team-wide automation
  • Collaborative environment focused on solving hard problems in AI semiconductors
  • Equal opportunity employer with diverse, growing team
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Tenstorrent

Tenstorrent develops advanced AI technologies and high-performance CPU chip designs, building the hardware and compiler infrastructure to support next-generation AI computing. The company is hiring hardware engineers (DFT, physical design, timing analysis, emulation) and software engineers (compiler development) to optimize chip manufacturing, performance, and AI software solutions.

View all jobs at Tenstorrent

Likely interview questions

  • Walk us through your most complex mixed-signal layout project—what were the key parasite and matching challenges, and how did you solve them?
  • Describe your experience with FinFET layout versus older nodes; what design rule complexities did you encounter at 12nm or below?