Tenstorrent
Physical Design Engineer: Die-to-Die Interface (RTL to GDSII)
About this role
Tenstorrent is on the lookout for a skilled Physical Design Engineer to lead the implementation of Die-to-Die physical designs from RTL to GDSII in a remote role. Candidates should have significant experience in physical design flows and expertise in high-speed interfaces for multi-die architectures.
What you'll do
- Lead Die-to-Die physical implementation from netlist to tapeout
- Oversee the full PD flow: synthesis, floorplanning, P&R, CTS, optimization, and sign-off
- Drive timing and verification with full STA and SI analysis
- Maintain and improve physical design methodologies and automation scripts
- Collaborate with chiplet teams and analog design on interface issues
- Utilize EDA tools for implementation, analysis, and verification
What they're looking for
- 5+ years in ASIC physical design at advanced nodes
- Expertise in full-chip implementation
- Knowledge of high-speed interfaces (D2D, PCIe, HBM)
- Proficiency in STA and timing closure
- Strong problem-solving and collaboration skills
- Experience with Tcl and Python scripting
- Familiarity with EDA tools like Synopsys and Cadence
- B.S./M.S. in Electrical or Computer Engineering
Benefits
- Competitive compensation ranging from $100k - $500k
- Remote work flexibility
- Opportunity to work with cutting-edge AI technology
- Collaborative team environment
- Equal opportunity employer
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Tenstorrent
Tenstorrent develops advanced AI technologies and high-performance CPU chip designs, building the hardware and compiler infrastructure to support next-generation AI computing. The company is hiring hardware engineers (DFT, physical design, timing analysis, emulation) and software engineers (compiler development) to optimize chip manufacturing, performance, and AI software solutions.
- Website
- tenstorrent.com