Design Verification Engineer, Intern

About this role

Tenstorrent is seeking a Design Verification Engineer Intern to join their SoC Digital Verification team in Boston, focusing on RISC-V and AI accelerator SoCs. The role involves ensuring functional correctness through developing verification environments and tests, providing hands-on experience in state-of-the-art AI technology.

What you'll do

• Develop and maintain SystemVerilog/UVM testbenches for SoC IP blocks
• Write and refine verification test plans based on specifications
• Develop constrained-random and directed tests, analyzing regression failures
• Analyze functional and code coverage results to identify gaps
• Contribute to automation and infrastructure to improve productivity
• Collaborate with cross-functional teams on expected behaviors and sign-off criteria

What they're looking for

• Pursuing a degree in Electrical Engineering, Computer Engineering, or Computer Science
• Understanding of digital logic design and computer architecture
• Familiarity with HDLs such as Verilog/SystemVerilog
• Interest in formal verification methodologies
• Proficient in Linux-based environments and scripting languages
• Problem-solving skills with attention to detail
• Clear communication skills for team collaboration

Benefits

• Hands-on experience with cutting-edge technologies
• Opportunity to work with industry experts
• Exposure to the end-to-end SoC design and verification flow
• Collaborative work environment
• Potential for internship extension