Hudson River Trading
Hardware Engineer Internship - Summer 2027
- Confirmed live in the last 24 hours
- No salary listed
- Internship
- On-site · New York, NY, United States
- Added 1 month ago
About this role
This Hardware Engineering Internship at Hudson River Trading (HRT) offers a challenging opportunity to explore both hardware design and verification within a fast-paced, real-time algorithmic trading environment. Interns will work on independent projects using SystemVerilog and Python, gaining exposure to cutting-edge FPGA/ASIC technology and contributing to critical infrastructure.
What you'll do
- Develop hardware designs using SystemVerilog.
- Build and maintain complex hardware verification environments in Python.
- Contribute to projects within hardware design and verification teams.
- Deep dive into existing hardware design and verification environments.
- Gain experience with FPGA/ASIC technology.
- Contribute to low-level computer architecture and logic design
What they're looking for
- SystemVerilog
- Python
- Linux
- Digital Logic Design
- Computer Architecture
- FPGA
- ASIC
Benefits
- Weekly base salary of $5,800
- Signing bonus
- Company-paid housing
- Company-paid meals
- Other perks
- Exposure to financial markets
Opens the official application on the employer’s site. No login required.
Hudson River Trading
- Industry
- Banking & Finance
Likely interview questions
- Describe your experience with SystemVerilog and how you’ve used it in past projects.
- Explain a challenging hardware design problem you've faced and how you solved it.