10 Hudson River Trading Software Engineer (New Grad) Interview Questions (2026)

Outline

STAR. Pick a real optimization where you measured baseline, identified bottleneck (profiler results), applied a specific change, and measured improvement. HRT cares about measurement discipline — claims of '10x faster' without numbers fail. Quantify everything. Mention what surprised you in the profiler output.

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Specific reasons: pure trading firm with no clients, small enough to have direct ownership, deep engineering culture (more engineers than traders), low-latency systems challenge, collegial atmosphere. Avoid 'high pay' as the lead. Reference HRT's engineering blog posts or specific systems work if you've read them.

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Monotonic deque. Store indices in decreasing order of values. On new element: pop from back while smaller than current, push current. Pop from front if index out of window. Front is always max. O(n) total. Walk through example.

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Matrix exponentiation. Express recurrence as 2x2 matrix multiplication. Compute M^n via fast exponentiation: O(log n) multiplications, each O(1) for 2x2. Walk through derivation. Mention Binet's closed form but note precision issues for large n.

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Sort, then for each i, two-pointer search for pair summing to -arr[i]. Skip duplicates at i, l, r to avoid duplicate triplets. O(n^2) time, O(1) extra space (excluding sort). Walk through example. Discuss why sorting helps (deduplication + two-pointer).

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Lock-free queue. Common: Michael-Scott queue using atomic CAS on head and tail pointers. ABA problem requires tagged pointers or hazard pointers. Walk through the algorithm at a high level — interviewers don't expect production-ready code in 30 min, but they want to see understanding of memory ordering (acquire/release semantics), atomic operations, and the ABA problem. Discuss tradeoffs: lock-free is fast but harder to verify; locked is correct but blocks.

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L1 (per-core, ~32KB, ~1 cycle latency), L2 (per-core, ~256KB-1MB, ~10 cycles), L3 (shared, ~10MB+, ~40 cycles), main memory (~200 cycles). Discuss cache lines (64 bytes typical), spatial vs temporal locality, false sharing (two threads writing to different variables on the same line). Code-design implications: array-of-struct vs struct-of-array, cache-friendly traversal order. Critical for HRT's low-latency work.

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Undefined behavior: code whose behavior is not specified by the standard — compiler can do anything (segfault, ignore the code, produce wrong output, work fine on one platform). Examples: out-of-bounds access, null deref, signed integer overflow, use-after-free, data races. Why it matters: optimizers assume UB does not happen, so they may eliminate seemingly innocuous checks. UB in trading code can cause silent corruption of P&L. Discuss UndefinedBehaviorSanitizer.

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Virtual dispatch: vtable lookup adds one indirection (pointer fetch) plus prevents inlining and complicates branch prediction. In hot loops, this matters. Compare to static dispatch: known at compile time, inlinable. HRT-relevant: in latency-sensitive code, avoid virtual functions where possible; use templates or CRTP for compile-time polymorphism. Discuss when virtual is acceptable (cold paths, infrequent calls).

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Layered: (1) Receive: kernel-bypass NIC (DPDK or io_uring), CPU pinning per receiver thread. (2) Parse: zero-copy, avoid heap allocation in hot path. (3) Route: lock-free queue per subscriber, with backpressure. (4) Send: same kernel-bypass back out. Discuss why every layer matters; cumulative latency targets ~5-10 microseconds for HFT. Discuss tradeoffs: bursty throughput vs sustained.