Research Engineer, Chip Design RL (Reinforcement Learning)

About this role

Anthropic seeks a Research Engineer to advance Claude's chip design capabilities by creating reinforcement learning environments and evaluation frameworks for RTL generation, verification, and physical design optimization. You'll combine deep ASIC/FPGA expertise with RL methodology to enable AI systems to excel at hardware design tasks.

What you'll do

• Design and implement RL environments and evaluation metrics for agentic RTL generation and formal verification
• Optimize EDA tool integration, latency, and proxy reward signals for chip design tasks
• Conduct experiments to validate RL approaches and inform team roadmap decisions
• Integrate research innovations into production training pipelines
• Collaborate with alignment, red teams, and applied training engineers across Anthropic

What they're looking for

• ASIC/FPGA design (RTL, synthesis, place-and-route)
• Design verification (UVM, formal methods, coverage-driven testing)
• Physical design and PPA optimization
• EDA tool proficiency and chip design flows
• Reinforcement learning environments and evaluation design
• Hardware design automation and tooling
• High-level synthesis and/or architecture simulation
• ML accelerator or HPC hardware experience