Etched.ai

Accelerator Software Engineer

San JosefulltimemidAdded today

About this role

Etched seeks an Accelerator Software Engineer to develop the firmware and kernel-level software that enables their custom AI inference chips to function. You'll work across ASIC firmware, platform microcontroller software, and host-side Linux drivers, specializing in one area while contributing across the stack.

What you'll do

Develop ASIC-level firmware including bootloaders, IO drivers, thermal/power management, and DMA transfers
Build microcontroller software for power sequencing, telemetry, and firmware updates
Design and implement Linux kernel drivers and PCIe interfaces for host-side device management
Collaborate on chip architecture decisions and participate in hardware bring-up
Implement on-device inference instruction execution and CPU initialization
Validate and test software across production-ready hardware

What they're looking for

Firmware design and debugging (ASIC and microcontroller level)
Linux kernel driver development
Embedded architectures (ARM, PCIe, DMA, HBM, DRAM)
Strong software fundamentals (data structures, algorithms)
Hardware bring-up and low-level systems integration
Experience shipping production software
Low-level computer architecture (caching, AXI fabrics)
Cross-disciplinary communication

Benefits

Medical, dental, and vision coverage with $500/month waiver option
$2,000/month housing subsidy for local residents
Relocation support for San Jose move
Wellness benefits (fitness, mental health)
Daily lunch and dinner in office
Unlimited compute budget subject to ROI justification

Likely interview questions

Walk us through your experience bringing up a new chip or board from power-on to functional—what were the biggest challenges and how did you debug them?
Describe a time you worked on firmware that had to interface between hardware and software layers. How did you approach testing and validation?

You'll be working across ASIC software, platform software, and host-side kernel drivers. Which area is your strongest, and what would you want to learn about the other two?
Tell us about a production system you shipped. What debugging tools and techniques were most critical for finding and fixing issues?
How would you approach optimizing DMA transfers or ring buffer command queues for both throughput and latency in an inference workload?
Describe your experience with PCIe, ARM architecture, or memory management (HBM/DRAM). How have you used low-level hardware details to solve a problem?
Give an example of an ambiguous, under-specified problem you've tackled where requirements evolved as you worked. How did you communicate across disciplines?

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