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Etched

Advanced Packaging SI/PI Engineer

San Jose$150k–$275kfulltimemidAdded today

About this role

Etched seeks an Advanced Packaging SI/PI Engineer to lead electrical performance optimization across silicon, package, and board for AI accelerator platforms. You'll own signal and power integrity from design through tape-out, collaborating with OSAT partners and internal teams on 2.5D/3D advanced packaging and high-speed interfaces.

What you'll do

  • Perform SI/PI analysis and optimization within 2D/2.5D/3D package architectures
  • Drive high-speed routing and SI requirements (112G/224G) from preliminary design through tape-out
  • Own PDN design strategy, decap placement, and IR/impedance targets across substrate and interposer
  • Manage ball map, C4, and BGA pin assignment in partnership with layout and ASIC teams
  • Design and correlate SI/PI test vehicles against silicon measurements during bring-up
  • Support board and rack-level topology studies including test vehicle and cable characterization

What they're looking for

  • Signal Integrity and Power Integrity analysis
  • Advanced packaging design (CoWoS, 2.5D/3D, interposer)
  • High-speed interface design (HBM, SerDes, D2D)
  • PDN design and IR/EM analysis
  • ANSYS HFSS/SIwave, Cadence Sigrity, or Keysight ADS
  • Test vehicle design and silicon correlation
  • Cross-functional communication and technical leadership
  • RTL-to-GDSII context understanding

Benefits

  • Medical, dental, and vision coverage with $500/month credit for waiver option
  • $2,000/month housing subsidy for office-proximate residents
  • Relocation support for San Jose move
  • Wellness benefits including fitness and mental health
  • Daily office lunch and dinner
  • Unlimited compute budget subject to ROI justification
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Etched

Etched builds AI inference hardware, designing and manufacturing complex mechanical and electrical components for data center systems. The company is hiring mechanical engineers, PCB designers, hardware verification engineers, and software engineers to develop manufacturing processes, circuit boards, verification infrastructure, and internal tools across its hardware and operations.

Website
etched.com
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Likely interview questions

  • Walk us through a high-power PDN design you closed—what were the toughest challenges with dynamic IR drop and how did you validate it?
  • How have you managed SI/PI tradeoffs between substrate stackup, decap strategy, and die-level power delivery in advanced packages?