Etched.ai

Optical Systems Engineer

San JosefulltimemidAdded today

About this role

Etched seeks an Optical Systems Engineer to architect and implement optical interconnect solutions for next-generation AI accelerator systems. You'll own the full lifecycle from design through production, integrating advanced optics technologies into high-performance inference hardware alongside cross-functional engineering teams.

What you'll do

Lead optical link architecture and system design for accelerator platforms
Evaluate and integrate next-generation interconnect technologies (NPO, CPO, OCI) into product roadmap
Partner with SI, PCB, ASIC, thermal, and mechanical teams on electrical-optical interface implementation
Engage optical module, laser, and PIC suppliers on specifications, qualification, and integration
Bring up optical interfaces on accelerator cards and debug issues using BERTs and sampling scopes
Own optical documentation including AVLs, fiber BOMs, serviceability guidelines, and assembly procedures

What they're looking for

Optical interconnect and transceiver system design (5–10 years)
Advanced architectures: CPO, NPO, OCI, LPO, XPO form factors
Optical link engineering: link-budget analysis, OSNR, eye diagrams, BER, FEC margining
Laser sources, modulators, TIAs, DSPs/retimers fundamentals
High-speed interfaces (100G/200G PAM4) and pluggable solutions (OSFP, QSFP-DD)
Photonic-electronic co-design and advanced packaging (fiber-attach, interposers, 3D integration)
Datacenter infrastructure and high-power liquid-cooled AI servers
Industry standards (OCI, Open CPX, OIF, UCIe)

Benefits

Medical, dental, and vision with generous coverage ($500/month waiver credit available)
$2k monthly housing subsidy for those near the office
Relocation support to San Jose
Wellness benefits covering fitness and mental health
Daily lunch and dinner in office
Unlimited compute budget subject to ROI justification

Likely interview questions

Walk us through your experience designing optical interconnect architectures for high-density compute systems. What tradeoffs did you prioritize between energy-per-bit, bandwidth density, reach, and latency?
Describe a time you brought up an optical link or PIC-based subsystem alongside silicon. What debugging tools did you use, and how did you collaborate with foundries or ELS vendors to resolve issues?

How do you approach co-designing optical engines with ASIC, substrate, package, and cooling solutions? What have been your biggest integration challenges?
What experience do you have with CPO, NPO, and OCI architectures? How would you evaluate which technology to integrate into a next-generation AI accelerator product?
Walk us through a link-budget analysis you've performed. How do you margin for IL, RL, OSNR, jitter, and FEC to ensure reliable operation?
How familiar are you with photonic-electronic co-design and advanced fiber-attach methods like edge couplers, grating couplers, and V-groove FAUs? Give an example of when you used these.
Tell us about your experience working with datacenter infrastructure—specifically high-power liquid-cooled AI servers and cluster-scale optical fabrics. How does this inform your system design decisions?

Unlock all 7 questions free — and practice them live →

Apply on the employer's site →

Opens the official application on the employer’s site. No login required.