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Astera Labs

Performance Engineer

San Jose, California, United States$135k–$170kmidAdded today

About this role

Astera Labs seeks a Senior Performance Engineer to build benchmarks and roofline models that quantify the performance of their AI fabric interconnect solutions. You'll conduct end-to-end workload studies on real GPU clusters, identify bottlenecks, and provide data that drives architecture and product decisions.

What you'll do

  • Design and execute performance characterization tests and benchmarks for scale-up fabric interconnects
  • Develop roofline models and analytical frameworks to measure fabric performance limits
  • Conduct end-to-end workload studies on real AI training and inference workloads at scale
  • Identify performance bottlenecks and recommend tuning strategies for fabric and firmware optimization
  • Partner with architecture and product teams to translate performance insights into design decisions
  • Create performance documentation and data that informs marketing and competitive positioning

What they're looking for

  • Performance analysis and benchmarking methodologies
  • GPU cluster architecture and interconnect technologies (NVLink, Ethernet, PCIe, CXL)
  • AI/ML workload profiling and characterization
  • Systems-level performance modeling and roofline analysis
  • Data analysis and visualization
  • Low-level debugging and instrumentation tools
  • C/C++ or Python for performance testing frameworks
  • High-performance computing (HPC) infrastructure knowledge
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Astera Labs

Astera Labs designs high-speed semiconductor connectivity solutions and ASICs for AI infrastructure, including SerDes/PHY IP and CXL Smart Memory Controllers. The company is hiring design verification engineers, quality engineers, firmware engineers, and physical design engineers to develop and validate these advanced chips for cloud and hyperscale platforms.

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Likely interview questions

  • Describe your experience with performance benchmarking of interconnect fabrics or high-speed networks. What methodologies did you use?
  • Walk us through how you would approach characterizing the performance of a new GPU fabric interconnect from first principles.