Design Verification Engineer - SoC

About this role

Etched seeks a Design Verification Engineer to validate custom chip components like systolic arrays, DMA engines, and NoCs for AI inference hardware. You'll develop verification infrastructure, correlate performance models with RTL, and collaborate across architecture, design, and software teams to ensure silicon-ready, high-performance designs.

What you'll do

• Develop test plans and verification infrastructure for performance validation and silicon correlation
• Create SystemVerilog and Python-based tests, checkers, and coverage monitors for performance features
• Collaborate with architects and RTL designers to verify design performance against architectural models
• Build and maintain performance models for chip subsystems and correlate with pre/post-silicon results
• Work with software teams to identify bottlenecks and optimize hardware-software integration
• Debug performance issues and conduct silicon tuning across the full ASIC design lifecycle

What they're looking for

• SystemVerilog testbench and checker development
• Python scripting for automation and performance modeling
• Digital design and ASIC design flows
• Performance modeling and simulation
• Understanding of memory hierarchies, pipelines, and interconnects
• Performance bottleneck analysis and profiling tools
• Coverage analysis and monitoring
• Compiler optimizations and workload tuning

Benefits

• Medical, dental, and vision coverage with $500/month waive credit
• $2k monthly housing subsidy for those near the San Jose office
• Relocation support for moving to San Jose
• Daily lunch and dinner at office
• Wellness benefits including fitness and mental health
• Unlimited compute budget with ROI justification