ASIC Physical Design Engineer

About this role

Join an ultra-low latency hardware team as an ASIC Physical Design Engineer where you'll own PD flows end-to-end while collaborating across trading, networking, and research. This role requires physical design expertise combined with RTL fluency and a willingness to improve engineering processes through better tools and software techniques.

What you'll do

• Own physical design flows end-to-end including floor planning, place and route, timing closure, and physical verification
• Lead power analysis and identify risks across the complete PD process
• Collaborate across front-end and back-end boundaries to optimize chip design decisions
• Work with cross-functional teams in trading, networking, and research infrastructure
• Design, test, and deploy advanced hardware for ultra-low latency applications
• Contribute to improving the hardware design process using software engineering techniques

What they're looking for

• Physical design flow management (8+ years)
• Floor planning, place and route, timing closure
• Physical verification and power analysis
• RTL design and reading/writing Verilog or VHDL
• High-level programming languages (Python, C++, Haskell, etc.)
• Cross-functional chip design thinking
• Tool development and process automation
• Hardware design fundamentals