OpenAI
Signal Integrity Engineer
About this role
OpenAI seeks an experienced Signal Integrity Engineer to lead SI design for AI supercomputer systems in data center environments. You'll collaborate across hardware disciplines to develop innovative interconnect solutions and drive system-level signal and power integrity for next-generation AI infrastructure.
What you'll do
- Lead system signal integrity design for AI supercomputer products in data center applications
- Collaborate with chip, package, board, rack, and system engineers to develop interconnect and high-speed technologies
- Perform simulation and modeling to identify and resolve signal integrity issues
- Lead system interconnect design, bring-up, and qualification efforts
- Evaluate new technologies and methodologies to improve signal and power integrity
- Influence hardware partner roadmaps for datacenter networks, racks, and infrastructure
What they're looking for
- Signal integrity (SI) system design
- SerDes design and testing for data center applications
- PCB, connector, and cable design
- System-level hardware design (chip through rack level)
- Simulation and modeling tools
- High-speed interconnect design
- Technical communication and knowledge sharing
- Ability to work in ambiguous and rapidly changing environments
Benefits
- Hybrid work model (3 days in office per week)
- San Francisco, CA location
- Relocation assistance available
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OpenAI
OpenAI builds AI infrastructure and products, including large-scale data center campuses for AI computing and generative AI applications for enterprise customers. The company is hiring civil engineers, project engineers, electrical design engineers, data center R&D engineers, and AI deployment engineers to expand its infrastructure capabilities and help customers deploy AI solutions.
View all jobs at OpenAILikely interview questions
- Walk us through a complex signal integrity issue you debugged in a data center or high-speed interconnect application—what was your approach and what tools did you use?
- Describe your experience with SerDes design and testing. How have you addressed challenges like jitter, crosstalk, or equalization in production systems?