Everpure
Firmware Engineer - PCIe
About this role
Senior Firmware Engineer role focusing on PCIe firmware design and development for DirectFlash™ SSD Modules at a leading data storage company. You'll drive hardware bring-up, implement advanced PCIe features, and collaborate across firmware, hardware, and driver teams to deliver high-performance storage solutions.
What you'll do
- Design and develop high-performance PCIe firmware for SSD modules, covering initialization, configuration, and runtime management
- Lead bring-up and integration of new PCIe hardware while ensuring specification compliance and optimal link performance
- Develop and maintain PCIe features including LTSSM, power management, hot-plug support, and error handling
- Debug system-level issues across firmware, drivers, and hardware; create advanced diagnostics tools
- Collaborate with hardware engineering on PCIe PHY integration, validation, and signal integrity
- Work on-site from Santa Clara, CA office in compliance with company policies
What they're looking for
- Firmware development for embedded systems
- PCIe architecture and protocol expertise
- C/C++ programming
- Python scripting for test automation and tooling
- LTSSM bring-up and link training debugging
- Register-level programming
- PCIe compliance tools and protocol analyzers
- Hardware/software co-design and cross-boundary debugging
Benefits
- Flexible time off
- Wellness resources
- Company-sponsored team events
- Growth opportunities and professional development support
- Innovation-focused culture
- Equity and incentive pay eligibility
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Everpure
Everpure builds cloud-native storage and data infrastructure solutions, including Kubernetes platforms and enterprise SSD products for mission-critical environments. The company is hiring technical support engineers, validation engineers, and solutions specialists to diagnose complex infrastructure issues, qualify storage hardware, and deliver customer support across cloud and storage technologies.
- Website
- everpure.com
Likely interview questions
- Walk us through your experience with PCIe firmware development—what was the most complex LTSSM or link training issue you debugged?
- How have you approached hardware/firmware co-design when PHY integration challenges arose?