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SK hynix America

On/Off-Chip SI/PI Engineer

San Jose, CAFrom $320kfull-timemidAdded today

About this role

SK hynix America seeks an On/Off-Chip SI/PI Engineer to serve as a technical liaison between HQ and U.S. customers, performing signal and power integrity analysis for HBM and next-generation DRAM products while driving system-level optimization and deep customer partnerships.

What you'll do

  • Perform on-chip and off-chip SI/PI design and analysis for HBM and next-generation DRAM products
  • Verify system-level SI/PI robustness through integrated modeling and 3D electromagnetic analysis
  • Analyze root causes of SI/PI issues and establish improvement plans
  • Build and maintain deep technical partnerships with U.S.-based customers
  • Drive system-level co-optimization beyond standalone DRAM design
  • Participate in technical engagements and strengthen SI/PI capabilities for advanced architectures

What they're looking for

  • Signal integrity (SI) and power integrity (PI) analysis
  • On-chip and off-chip PDN design
  • 2.5D/3D IC architecture understanding
  • SI/PI simulation tools (HFSS, SIwave, Sigrity, ADS, HSPICE)
  • Package and PCB layout review tools (Allegro Design/APD)
  • 3D electromagnetic analysis
  • DRAM on-chip architecture and electrical characteristics
  • High-speed channel analysis

Benefits

  • Top-tier health insurance at no employee cost
  • PTO, company holidays, and Happy Fridays
  • Paid parental leave program
  • 401(k) matching
  • Educational reimbursement up to $10,000 per year
  • Free breakfast, lunch, and dinner
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SK hynix America

SK hynix America designs advanced memory solutions including high-bandwidth memory (HBM) and AI-focused memory architectures, with a focus on next-generation chip performance and energy efficiency. The company is hiring circuit design engineers, systems engineers, application engineers, and packaging specialists to develop innovative memory technologies for AI and high-performance computing platforms.

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Likely interview questions

  • Can you walk us through a specific SI/PI issue you diagnosed and resolved in a previous role?
  • Describe your experience with 2.5D/3D IC architectures and how you've analyzed their SI/PI challenges.